"Programmer Electronic Control"

- Chronology -

Part No. 51-019-02, NSN 1680-99-652-3410,
Supplier K0656, Marconi Avionics, UK

Erik's diary regarding PEC, starting in 2004...

2004	2004	2004
11/29/2004	Got PEC serial 42 from Abex Co./UK (eBay).	Serial 42
12/16/2004	Made inventory of NSNs of the installed PCBs and submitted first posting. Found out, that timing is generated by mono-flops of type 74121 and made first list of chips used. Submitted posting on the unit with several questions in the use-net group rec.aviation.military.
2005	2005	2005
1/10/2005	Deciphered pin-out of the 8 PROMs used on the SK11, "Function Decode PCB" for the microcode of the unit. They are compatible to the 82S123 being 32bytes with open collector output.	82S123 data-sheet
2/19/2005	Analyzed the output section of the power supply: Supply voltages of the unit are clear now as well as a "power good" signal. There is some kind of feedback from the unit (later it became evident, that the core voltage and thus the currents are adjusted according to the temperature of the core-plane). Still unclear: What is the input voltage (guess 115VAC, 3phase) and how to supply/generate this.
2/22/2005	Layout and principle of operation of the core section roughly analyzed. Sketch of the schematic completed: Memory is 12bit*8192 words.
2/25/2005	Submitted posting to the "Professional Pilots Rumor Network" (PPRuNe) to see whether there is someone out there recognizing the unit and having any information. Unfortunately there was no feedback.
3/12/2005	Rx-Tx-Board investigated: Contains 100R differential line drivers. Four links are highly symmetric and can only be used one-at-a-time. Rough sketch of this section complete.
3/29/2005	Checked SK10, the "Control Register" and drew rough schematic diagram. Decision: unit must be complete Computer and is worth further investigation. Connected logic analyzer (Agilent 1661A) to the pins known up to now and prepared power supplies for external input. Removed core plane and stored at save location (idea: might still contain code which can be recovered later to learn about the command set).
4/11/2005	After trouble with the logic analyzer's floppy, setup now via GPIB control from Sun SPARC Station 20 which works great. Started investigation of the signals at the memory and memory-processor-interface. Connected DIP switch to apply defined bit pattern to be read from non-existent core plane. Discovered a GOTO-like command (later RJMP).
8/11/2005	SK8 and SK9 analyzed: They contain accumulator and ALU (some adder,shifter etc.) and each of the identical PCBs holds 6 bits. First computer generated diagrams of PEC's internals complete for documentation purposes. From the already known commands, idea emerged to write an assembler in TCL and implement discovered commands simultaneously. This proved extremely valuable later as platform for writing test programs to investigate and analyze further commands...	"Birth" of Assembler: pecasm V0.1
8/20/2005	Next level in the analysis-setup: Built hand-wired interface between a Parsytec-Megaframe Transputer PCB and the PEC. This allows to apply bit patterns to the PEC's bus. Connected this to the unit with the logic analyzer. Transputer and logic analyzer are controlled via workstation (Sun SparcStation20, dual Ross-200) allowing rapid cycles of applying patterns and analyzing them.
10/10/2005	Setup now able to generate timing for accessing core memory. Inserted the core module again and verified correct behavior on word 0 of the memory. After adjustments of voltages and timing read out the whole memory 5 times. Got 5 nearly identical copies (error rate about 1 wrong bit per 4000, reason unknown by 2005). But memory did not contain any useful information: Mainly 0 and only very few 1s -> No usable information in core memory found!	Hex-File
10/11/2005	Additional information: PEC starts operation at 0xa0 after reset. Setup now able to write core, observe 100us of operation of PEC via the logic analyzer and read out memory afterwards. Basically, this setup remained unchanged for a very long time.
25/11/2005	Reverse engineered timing generator for core memory. Made documentation of read/write timing.
01/11/2005	After many postings in rec.aviation.military regarding PEC, this tread leads to suspicion that PEC controlled backseater's displays in Panavia Tornado.
05/12/2005	Measurements on patch-panel and connected more of the relevant signals (SK7 and SK15 mainly) to the logic analyzer.
2006	2006	2006
02/09/2006	Discovered, that freezing of PEC is related to bit 7 in instructions like STA and is related to IDX register, too. Commands confirmed: ADD (no carry!), LDI, STA. Assembler extended to accept the new commands.	ADD, LDI, STA Assembler V0.96
03/20/2006	Instructions SHR and SHL analyzed, added to the assembler. Current version 0.97.	SHR, SHL Assembler V0.97
04/22/2006	Conditional jumps RJAZ and RJAN discovered: Jump if accumulator holds zero or is negative. Assembler extended to accept these commands and produce various list files (hex, octal). Version is 0.98 now. Interesting notice: This machine does not have a carry bit, thus writing e.g. 24bit arithmetics is not that easy.	RJAN, RJAZ pecasm V0.98
05/28/2006	Deciphered input and output format on the fast links DPL1 to DPL4; sketches of the associated circuits complete: Transmission is SPI-like with 3bit header, R/W bit followed by 12 bits of data. End of transmission is indicated by dropping one clock cycle.
11/22/2006	Discovered that occasional memory errors in writing to core by the Transputer are related to the T805's refresh cycles. Fixed this problem by a small additional PCB on the Transputer interface detecting refresh cycles which can thus be avoided to interfere with the code writing to core. During this experiment also made measurements on the temperature dependency of optimum currents to operate the core stack.
12/08/2006	Plugs identified as MIL38999 plugs. Sorted out Amphenol part numbers and ordered socket contacts for tests at GlenAir/Germany.
2007	2007	2007
01/07/2007	Discovered UMUL and confirmed as unsigned MUL. But by this time, I had not fully understood that the extension register holding the additional 12 bits of the result is the same as the index register B. Roger Holmes gave me the right hint later this year - Thanks! Up to now, the large setup with it's many switch mode power supplies caused spikes in measurements with the oscilloscope due to grounding problems. Added ferrite cores to reduce common mode noise making measurements much easier. Oscilloscope can now be triggered by the logic analyzer.	UMUL Multiplication
01/14/2007	Hand-wired console LCD completed. This connects to one of the fast serial links of the unit and is powered by a 9V battery. Works fine and first "Hello World" program executed successfully on PEC.
2/25/2007	Assembler: Improved handling of labels, implemented support for macros using the M4 macro processor. Added all commands deciphered up to now with parameter checking and error messages. Version increased to 0.99.	Assembler pecasm V0.99
03/08/2007	Posting in classiccmp mailing list with short report on my efforts. In the emerging thread, the command set is being identified as being similar to the Elliott900 series computer (Hint from Roger Holmes: Elliott 900 uses 18bits and a very similar structure of commands!). Before submitting the initial posting, I put a description of the commands known up to date online into my home-page.	Somewhat later and extended pdf version of the original posting:
03/17/2007	Confirmed addressing mode "modified" to be MD128+offset. This causes PEC to freeze (even reset can not clear this lock), if an address outside of PEC's memory is being accessed. During search for yet undiscovered commands, came across some kind of RETFI (return from interrupt) instruction.	Indirect Addressing RETFI
03/18/2007	Released second, strongly expanded, version of my documentation on the Programmer Electronic Control via the project's web page. This contains a description of most commands deciphered so far with execution times. In the appendix there some sketches on PEC's internals and timing diagrams as well.
03/21/2007	Discovered that there are several interrupt vectors which are accessed in entering interrupt level. But only one return address associated to the RETFI instruction. This was the start of investigation of the interrupts and IO machinery. In total this was much more difficult than anticipated and consumed nearly the same time the whole process up to now did!	IRQs discovered
04/15/2007	Got a Ferranti FIN1010 inertial navigation system via Helmut Singer. Bought this because I had the idea that this could be connected to PEC. Investigated the included computer, but technology is different and there is no way that this was connected to PEC. But nevertheless, the Internet store of Helmut-Singer always offers strange and interesting items.	Helmut Singer GmbH
08/12/2007	Submitted posting to the German avionics/aircraft group on the FlugzeugForum, www.flugzeugforum.de. There emerged some interesting discussion on Tornado, it's computers and displays. But no hint on the Programmer Electronic Control or it's application.
08/15/2007	Second try in submitting a posting to the "Professional Pilots Rumor Network", www.pprune.org. This time, there was some feedback on the Tornadoes displays. But no input specifically regarding the Programmer Electronic Control.
09/15/2007	Got PEC serial 129, again from Abex Co./UK (direct sale). In comparing the two units, some differences regarding the grounding scheme became apparent. Apart from some obvious questionable design features of all units (e.g. the covers are electrically insulated from the housing by the black painting used - very strange) they obviously had special grounding problems at the plugs, leading to added grounding in unit No. 129.	Serial 129
10/27/2007	Investigated slow link on DPL05. Format of 24 bit in/output is clear, but completely unclear remains how to sync software's read and write access to the shift registers with transmission itself.	-
11/01/2007	Released third, revised, version of my documentation on the Programmer Electronic Control.
11/16/2007	Input from experts at "Deutsches Museum" that liquid cooling often is only present in radar systems and not in ordinary avionics applications. This new input ruled out the backseater's displays as application for the units. Since the original source of the units insisted that the units are from a Tornado application, a new hypothesis emerged: The units might have been used on the Foxhunter radar of the Tornado ADV.	The unit's coaxial connector for liquid cooling: New suspected application:
11/27/2008	The continuously growing test program used for many different tasks got sufficiently versatile (e.g. includes display support) making it worth being called programmer electronic control - tiny operating system alias pec-tos.	PEC Operating System Birth of pec-tos, V0.60
12/17/2007	Confirmation by Roger Holmes (who asked Terry Froggatt as I was told later) that the unit's architecture is indeed very similar to the Elliott computers and the unit might be an Elliott 12/12 airborne computer.
2008	2008	2008
02/08/2008	Got information, that liquid cooling in Tornado is only used in ADV's radar system utilizing Coolanol. Subsequently found traces of a red fluid in the ducts of PEC which matches the look of Coolanol. Therefor PEC finally ruled out being related to the cockpit displays in Tornado. New hypothesis is, that PEC was used in the first stages of the Foxhunter AI24 radar (Stage1, and Stage 1+) which was unable to fully meet the required specifications. According to the time line of Foxhunter development, the units (if really used in Foxhunter) where in service until 1996 when the digital electronics in Foxhunter was replaced to lead to Stage2 for this radar system.	Foxhunter article on the Internet.
02/18/2008	Got PEC serial 90 from Tim Wayre in UK via eBay.	Serial 90
04/29/2008	Completed porting the sim900al emulator by Terry Froggatt and Don Hunter to gnat Ada by implementing new graphics handling - first release (Windows, IRIX, Solaris). The emulation runs about 10 times faster than the original machine on a 500MHz UltraBook.	Sim900al-NT, V1.0
05/01/2008	Investigated IRQ circuit, hereby identified the possible IRQ sources (0: Unknown,1: SlowLink,2: Timer,3: FastLink Rcv,4-7: DPL1-4) and the associated IRQ vectors. Timer IRQ is working already. IRQs of the fast links are always asserted if no device is connected. Applied bridges to turn them off.	IRQbridges on DPL01-DPL04
05/03/2008	Released document showing detailed photographs of all PCBs of PEC, serial PEC129. Shown are component and solder side of each PCB on a separate page.	PCBs of PEC No. 129
05/15/2008 05/16/2008	Joined the CCS seminar "Early computer programming at Elliotts" in London: Got more information on the 920, 902 and 12/12 series of computers from Terry Froggatt. Especially fruitful was the personal discussion with Terry on the following day together with the demonstration of his just repaired 920. This was definitively one of the the most exciting days in the PEC related research. On 5/16/2008 I visited the RAF Museum near London. Apart from many interesting aircraft, they have a huge archive holding many air publications. Among them I found documents related to the Nimrod reconnaissance aircraft, which used the 18 bit Elliott 920M in various applications. One of these documents even contained flow charts of the microcode and complete schematics of the Elliott 920M unfortunately too many pages to make copies of...	902 Facts Card 12-12-Specification
05/23/2008	Deciphered in detail how the IRQack command works and sorted out what the bits in the IRQmask part of this instruction mean. Assembler support for these instructions added, documentation updated.	IRQack, pecasm V1.03.
06/08/2008	Added timer interrupt handling to pec-tos,converted all comments to English and performed severe clean up. Now the OS handles all interrupts in parallel and prints letters to the console for each IRQ call handled. All interrupts work nicely in parallel now!	pec-tos V0.70
06/17/2008	Last custom chip reverse engineered by ohmic and dynamic measurements. All chips within PEC (even custom ones) identified now. Launched separate page listing all the chips with data-sheets and a statistics showing the date codes of the chips used in PEC #42.
06/23/2008	Discovered the blinkenlights-bus, a data-bus dedicated to debugging and hardware diagnosis leading to the big programming- and diagnosis-plug DPL07. Functions deciphered by 80 percent. First experiments of attaching a cable to the diagnosis plug DPL07 of PEC using an Amphenol plug with soldered socket contacts - inserting and removing such socket contacts is really pain and for final blinkenlights this has to be done by the properly crimped connections.
07/16/2008	Remaining pins of DPL07 recognized and more than 90 percent known. List with function descriptions for documentation purposes generated (first version).	-
09/10/2008	Added a PROCEDURE mechanism to pec-tos using macros. This mechanism allows comfortable definition and calling of functions and procedures where the assembler is implementing everything (memory allocation for destination- and return addresses) automatically using PEC's IDXCALL command. BTW: The Elliott machines (as many other machines of those days, e.g. PDP8 from Digital Equipment, too) do not have got a stack as modern computers do. Thus calling subroutines and sending parameters to them has to be handled in a different and rather complex way.	pec-tos V0.80
10/25/2008	All interrupts work reliably and in parallel now in PEC-TOS (aka PEC-Tiny/Trivial-Operating-System) V0.81. Major new discovery: Sync with SlowLink on DPL05 has to be done by it's associated interrupt: Immediately after the interrupt is asserted by the hardware, there is a window of about 100us time during which the 24 bit value received can be read from the shift registers and the value to be transmitted can be written. Despite the link being slow, this update of the shift registers is very important and thus this IRQ has a very high priority...	Slow Link pec-tos V0.81
12/17/2008	Simulated memory expansion to 32k words via DPL07 and the Transputer setup successfully for the first time. External simulation of paper tape and TTY also successfully implemented in Transputer, too (all used only one out of 12 bits). Added commands RPPT, WPPT, RTTY and WTTY to assembler.	RTTY, WTTY, RPPT, WPPT
2009	2009	2009
01/07/2009	Ideas for building new console with display, switches and 8751 processor to interface a plotter finalized. As well as way to go to build blinkenlights and second generation of Transputer-interface to connect to DPL07 decided. Selected suitable programmable logic device and conducted first experiments using an evaluation board of this EPM7128 from Altera connected to PEC. Started PCB design using EAGLE5.3 -> 4-layer PCBs.
01/18/2009	Frederic Im. from France connected me via email regarding the PEC. He acquired >10 of them and is currently reusing the outer case of a unit for a project with the vintage Intel 4004 processor. In the weeks to follow he reverse engineered the input section of PEC's power supply and managed to power up his units continuously. I have got no further information, what his plan about his units is.	-
02/12/2009	Got new PCBs from manufacturer: New Trapu-Link and new FastLink-interface. Started CPLD development and mounting of components. The new Transputer-interface was up and running within one day - now featuring a digital means of detecting the refresh cycles of the Transputer thus allowing faster and more reliable programming of PEC's core memory. This new interface will go in service together with the new blinkenlights - hopefully beginning of 2010...
03/20/2009	PEC #129 runs on it's own supply in intermittent operation using a rotating inverter and a battery of transformers to step up from 115VAC to 200VAC 3 phase current. Power of the inverter (being from an Alouette helicopter) of 100W is not enough for continuous operation of PEC but nevertheless the inverter is a beautiful and very noisy device. Interesting issue: The inverter has only four pins: Negative input and one of the three phases are connected to chassis... ;-)
04/6/2009	Got proper tools via eBay for making professional crimped connections of various cables to the AMP plug. Completed tests on which cabling to use in connecting the future blinkenlights- and Transputer-setup to DPL07 without hampering signal quality. PEC's cycle time is on the order of 1us, but timing is critical since the unit is asynchronous. Ringing etc. has to be kept to a minimum to ensure reliable operation.
04/10/2009	Released newest version of my documentation on the Programmer Electronic Control - now rather complete with details on interrupts and corrected errors in the section on the fast links. Timing diagrams on fast link transmission (send and receive) are given in the appendix.
04/12/2009	New FastLink-PCB working properly: Possible to write AND read via FastLinks DPL01-DPL04. Implemented console abstraction in pec-tos to switch easily between old hand-wired and new console PCBs. CPLD-Design complete, 8751 operational. The picture on the left shows PEC-TOS online. The letters in the second line show which switches on the console are on (K) and which interrupts occurred in the first 100ms of operation.	pec-tos V0.84
04/29/2009	Removed minor bug in pec-tos with pointer handling and reworked the TRAP macro, allowing to stop the OS giving a message on the new console display.	pec-tos V0.85
06/06/2009	Implementation of driver for pen plotter CalComp M84 in FastLink PCB completed; API included within the operating system to move and draw with relative and absolute coordinates and to send commands to the plotter. Essentially plotter commands from PECs view are single assembler instructions: PlotterPreLoadX, 15/1/6, Preload new x position from accumulator. PlotterPreLoadY, 15/1/7, Preload new y position from accumulator. PlotterDrawX, 15/1/8, Draw using accumulator as x and preloaded y. PlotterDrawY, 15/1/9, Draw using accumulator as y and preloaded x. PlotterMoveX, 15/1/10, Move using accumulator as x and preloaded y. PlotterMoveY, 15/1/11, Move using accumulator as y and preloaded x. Digitized a picture of PEC via xfig, converted to hpgl and from there using a home-brew program to an asm-file for pecasm, containing the data. Now pec-tos can draw a simple geometric pattern, write text and draw an outline of PEC. Unfortunately there is some issue with certain core pages preventing to load the full data set to PEC. Thus only the plug-section of PEC's outline is drawn by the plotter.	pec-tos V0.90
6/28/2009	After hours of fiddling around with the insertion and removal tools, the cable connecting to the diagnosis and programming plug of PEC is completed and the plug assembled. Cable itself is made from Amphenol spectra strip ribbon cable.
11/8/2009	Restoration of a Facit N-4000 paper tape punch/reader completed after trouble finding a appropriate firmware EPROM. Wrote a test program "BigLetters" to punch out nice banners (just for fun) and read in the original Elliott assembler SAP together with the "trigger tape" to launch programs from the II (i.e. initial instructions). Design of the blinkenlights to be built will offer the possibility to connect the paper tape unit directly to PEC.
11/17/2009	Acquired a package of computers from the Tornado via Liquibiz. Among them an Autopilot-Flight-Director-System (part nos. 49-133-01 and 49-134-01) and most important a TV-Tab waveform generator (part. no. 51-011-21). This contains some VERY nice technology since it seems to supply two independent video channels for raster scanned displays with the possibility to lock onto an external source (superimposed radar images?). Entirely built of TTL chips it is from the same epoch as PEC itself and image generation is obviously a genial technology without utilizing a frame buffer as modern graphics cards usually do. There are some interesting patents on the analogue precursors of this device by Elliotts (US4188627A, US3657558A) and later ones which might well relate to the digital version (e.g. DE2252556A1). This waveform generator will surely be a project to be analyzed and connected to one of the fast links of PEC after the blinkenlights are completed.
2010	2010	2010
1/22/2010	Completed the first PCBs for the blinkenlights: The LED-Lines are feed via a serial high speed link (update rate faster than PEC's cycle time) and display up to 16 bit words (e.g. 12 bits for accumulator and 15 bits for addresses) on a row of LEDs. The value displayed on the LEDs is autonomously converted to a hexadecimal display on the smart pixel display and an octal/decimal reading (later selectable by a switch on the blinkenlights panel) on the 7 segment displays. There are additional LEDs e.g. to mark a value as valid or indicate whether the last access to memory was a read or a write cycle. The PCBs needed to be assembled on a tool for alignment of the LEDs otherwise the result would not have been satisfying. The next PCBs already designed and expected to arrive for assembly in February are a backplane which will be the "nerve center" between PEC and the Transputer, holding up to 5 small plug-in PCBs. These containing CPLDs from the Altera MAX7000 series contain the necessary logic for interfacing to PEC. The first plug-in module to be tested will allow memory expansion of PEC to 32k words of memory XOR simulation of paper-tape and tty.
1/30/2010	Recycled some venerable switches and buttons for the PEC's blinkenlights to be build by dismantling a "Data Monitoring Unit", NSN 6625-99-6559680, manufactured by Smiths Industries under part. no. 2001TE/1. Rumors have been, that this was used on some computer within the early Harrier VSTOL aircraft. The chance of finding such a beast is zero and thus the switches will get some new job soon.
3/26/2010	After receiving last parts for the housing the 3 phase inverter is completed now. This inverter is based on three audio amplifiers, each being capable to deliver 60W of power. Three transformers allow different voltage ranges (0-120VAC and 0-240VAC) by switching from the star to a delta configuration. Initially the 24V supplies have not been strong enough for a continuous operation of PEC, but with the new supplies this works very well.
4/14/2010 to 4/18/2010	Had a very exciting second visit to the UK: Visited the museum in Bletchley Park holding an Elliott 800 in working condition and a non working 905. Lot of time is spent by volunteers in maintaining the wonderful collection of avionics items at the Farnborough Air Sciences Trust Association which was well worth the visit as was the excursion to Kent to visit the Rochester Avionics Archives holding many items manufactured during the long history of the vintage Elliott Brothers Ltd. to become part of the current BAe Systems. Another very impressive event was the demonstration of Roger's huge ICT1301 machine which Roger and Rod lovingly call Flossie. Many thanks to Roger and Rod for turning the baby on during my visit. The highlights of this journey definitively have been the nice evening with Peter and the time together with Terry and Val - Many Thanks! Due to the volcanic eruption the schedule of the weekend got severely disturbed, since my wife was not able to join me for sightseeing in London. So after a visit in Cosford to see the mighty TSR2, I spent the Sunday for a strange journey back to Munich: Travel took 24 hours by 10 different means of transportation instead of 2h time of flight.
5/30/2010	After struggling with the Altera Quartus 9.1 software for several weeks I got a fix of the problem from Altera in April. Now there is progress with the actual setup again and on 19th of May the word generator module was working for the first time. The two Transputer setups work in parallel now: The old one wired to the backplane still controls PEC and is able to access the core memory. The new one, being connected to the debugging plug is going to implement the first new functions and will later make the old Transputer superfluous. On 5/25/2010 the second module in the new setup holding a memory expansion, giving the PEC an additional 24k words of memory ran for the first time. Since the PEC is an asynchronous machine, it is able to run at nearly twice the speed from silicon memory than from its internal core. But due to thermal issues I artificially slowed silicon memory's speed down. Up to now the software on the Transputers is strictly single-tasking, but for the ongoing project (experimental PPT and TTY emulation) it has to go multi-tasking...
8/21/2010	As there is lot of interesting vintage stuff around - I had a short look at the waveform generator (WFG1) acquired on Liquibiz in 2009. Thanks to Peter, who supplied me the pin out of this baby and with some reverse engineering I was able to modify a vintage CRT screen to accept the somewhat weird output of the WFG and to launch the self test of the unit. Although not directly compatible to PEC it is well possible building an interface to attach the WFG to PEC via one of PEC's fast serial links. This will be an adequate display for PEC and surely an upcoming project. Of course reverse engineering of the "language" WFG expects is necessary. By the way: This "Graphics Card" does not contain display memory as today's devices do (memory was rare in the 1970ties). The picture is virtually drawn by its x-y coordinates very fast and continuously. If the CRT's beam is at a point which is generated by drawing process, than it is turned on for a short time. So the memory of the WFG contains objects (circles, characters, lines) and their locations. A real masterpiece even being dual headed (two CRTs!).
21/11/2010	In waiting for PCBs for controlling the LED lines being manufactured I worked on the new Transputer setup implementing sockets and multi-processing there. Abusing the CPLD-PCB which will be a tracer in the future, it was possible to implement a first version of paper tape (PPT) and teletype (TTY) simulation. I.e. the new setup supplies or receives characters if PEC is accessing these devices. The Transputer redirects PPT requests to files and the TTY to a socket allowing easy access from any machine. In this way it was possible to execute the original 902 assembler (SAP=Symbolic Assembly Program) on the PEC - HEY, look at the output as the SAP starts compiling himself on the vintage box! Well, not fully true - the original SAP had to have a tiny patch applied to work on PEC: The periodic interrupt system not existent on the big 902 caused a crash by overlapping interrupt vectors.
12/12/2010	Highlight of this weekend is the finalisation of the Blinkenlights, i.e. the PCBs monitoring the internal registers of PEC and showing them on LED lines, on hex and octal displays and allowing the new Transputer to read their values. Although the setup is very crowded now it works perfectly as can be seen from a small video of the setup in action: The video starts showing the four units displaying PEC's registers S, A, E and D. First you see that there is a sudden change in the register display - here I started a small test application on PEC. This application stops immediately as it wants to access external memory within the memory expansion. As the camera looks to the right, the flashing red light can be seen on the Memory Expansion Mode Switch telling us, that PEC is blocked by waiting for memory being enabled. Afterwards you see me enabling the three external memory banks (switches turning red and at the end the red flashing light remains off). Now the two LED displays in front of this switch show activity: They show the last address in the external memory, accessed by PEC together with the data read or written. Afterwards the camera looks back to the register display which now shows hefty activity as the test program digs around in memory. Hopefully I will find the time to put everything into a nice wooden box some when in the future. There is already a sketch what the final front of the PEC-Operators-Panel will look like.
2011	2011	2011
1/27/2011	Among the black boxes bought via Liquibiz in 2009 there was an Engine Computer from Tornado Z324. This jet engine controller with part number 300-2C-3B containing lots of chips from Lucas Aeorsapce makes a nice addition to the RB-199 jet engine on display in the aeronautical exhibition of the Deutsches Museum. So I donated the unit and it will probably be visible in this exhibition after the reorganisation in the following two years.
2/12/2011	Uploaded the latest version 1.2 of the Sim900al-NTR: Now there are distributions for Sun and SGI UNIX systems and for Windows 2000 or later. The distributions contain much more examples, source code and the simulator now is able to handle paper tape input from and output to files. Thanks again to Terry for his tips!
3/20/2011	By end of 2010 there was an auction on Liquibiz which listed CRPMD displays. This acronym stands for Combined Radar and Projected Map Display and it is the central display in the Tornado's back cockpit and by the way the biggest unit in the cockpit. The German electronics company Helmut Singer Elektronik won the auction and I bought one of these from them. It consists of an analog storage CRT tube whose image, delivered by the radar, is projected to the frosted screen where it is overlayed with a projection of a standard 35 mm dia film. Only a small portion of the film, given by the selected scale, is projected and the main computer adjusts the projected area and the rotation of the complete projection unit to align the map with the aircraft position being in the center of the screen and the flight path pointing upwards. If the aircraft moves, the film is moved as well and from time to time there is heavy winding since the map consists of many stripes. By detaching the CRT assembly from this extremely heavy unit (>35kg) it is easy to "project" own images to the screen and I assume a bright LCD will do, too. Although I think the German Tornados still use this type of CRPMD, the British ones might have undergone update utilizing a LCD display (see TARDIS). Any information on this unit (NSN 5841-99-991-1833, Ferranti Part.No. 3892/72000-02-011) or the closely related RPMD (NSN 5826-99-573-1589, Ferranti Part.No. 3892/75500-02-010) is highly appreciated since I do not want to start a bigger reverse engineering project on this one now.
4/18/2011	The final front panel for the PEC's Operators Panel arrived from the workshop. It was reliefing to see that all parts fitted in very well after it took several weeks for the QCAD drawing to materialize. Because the front panel is made from rather thick Al (5 mm), I used a milling machine to reduce the size where the displays need more room to increase the viewing angle. Later a wooden box will follow covering the rear side where all the electronics will be mounted.
4/20-24/2011	Over the last ten years Prof. Simon Lavington wrote a awesome book on the Elliott Brothers company. The launch of this book and the talk he gave on 21st of April in the London Science Museum was a perfect reason to visit London again. This time my wife Pia was with me and apart from joining the CCS talk we had a great time sightseeing in London and we spent a great day walking and picknicking with Terry and Val. The weather was phenomenal and thus the walk along the Thames, the visits of the Tower, the Tower Bridge, the National Gallery, the museums in Greewich and may other places was a great experience. BTW: I had the opportunity make some input to Simon's book, especially to the Appendix 6 which can be viewed online on Springer's web page.
5/20/2011	During the last weeks a lot of time went into analyzing and understanding the MECSL (=Marconi-Elliott-Computer-Systems Ltd.) floating point library for the 12/12 which survived in one of Terry's boxes. First I encountered issues compiling the library (the original MECSL assembler was somewhat different from the later assembler I got from Terry) and of course the floating point number format as well as the way to use the library had to be figured out. The really interesting point on this library is, that it is an interpreter which essentially behaves like a floating point processor or a microcode extension - at least for the basic functions. I.e. if you want to use floating point you do not have to call weired library functions all the time but one has to call a subroutine once which immediately returns. From now on, one can use ordinary assembler commands like ADD, MUL and DIV but they are not obeyed directly any more - the interpreter does the floating point arithmetics. Using a special function this mode can be terminated again if one is done with FP arithmetics. For me this is a really clever design from the 1970ties although the implementation is ... well, ... ugly. What followed was an investigation on accuracy (see pictures starting with MECSL-FLoatTest* for plots of relative accuracy for all relevant functions supplied by the library). The accuracy is usually around 1E-5, whereas from the bits in the mantissa I'd have expected a higher accuracy. Additionally there are systematic deviations in the EXP function and ranges of lower accuracy in LN, SIN, SQRT, ATAN and even the multiplication! A function for converting floats to integers actually is severely broken as very small floating point values get converted to big integers instead of zero! But a software report from those days states, that the library has probably not been used by customers, so perhaps it was not tested very well. An investigating how the numerical error builds up during the Savage benchmark shows, that accuracy is really bad - especially if compared to the same algorithm utilizing 5 digit arithmetics using Mathematica. Anyhow even modern software is not without pitfalls regarding accuracy as can be seen if the Savage error is plotted aversus the precision set in Mathematica: As the set precision is increased, the Mathematica relies too long on the IEEE floats before activating its own floating point arithmetics, leading to unexpected low accuracy (up to 4 orders of magnitude!) at certain precisions set! Last but not least: Speed. The library is faster than a Z-80 at 4MHz being programmed in assembler or the 68000 based TI-92+ using BASIC which finally is a cold comfort. Summary: During this investigation I really learned a lot on floating point numbers, their representation, several pitfalls and how arithmetics is done correctly (E.g. by the CORDIC method for trigonometric functions)!
6/2/2011	Another update of Sim900al-NT-R: Version 1.3 has changed behaviour upon the 15 7168 instruction (terminate interrupt) of the 900 series: If encountered at base level, operation continues at base level. This allows the simulator for the 12 bit machines (like PEC) to be operated within the 18 bit simulator even with single stepping. I used this to learn how the 1971 MECSL floating point library has to be used.
6/23/2011	Speaker attached to the PEC-Panel (Yes, computers of those days always had a speaker to hear what is going on and allowing trained technicians to hear what the problem is) and implemented code in one of the CPLDs to convert PEC's memory transfer signal to an audible signal sounding similar to Terry's 920 whose sound I recorded during my visit in 2010. Here is a recording from today what PEC sounds like in compiling software: For the first fraction of a second (0.0s-0.9s) you hear background noise of the SparcStation and me pressing the Enter key. This makes the first/old Transputer writing the inital instructions into PEC (0.9s-1.2s) and launching them. Now PEC starts loading the assembler (aka SAP, the Symbolic Assembler Program) from the virtual paper tape being simulated by the second Transputer within the new BlinkenLights (finished at 4.3s) which is automatically started afterwards. The assembler now waits until the operator places the first source tape into the reader (of course in my setup the BlinkenLights Transputer does this automatically) and acknowledges this by toggling key 11 on the word generator. This waiting leads to a regular sound (4.3s-5.8s) until I manually toggled the switch on the panel. From than on, PEC reads the source tape for the first pass until the very end of the recording. To compile larger software the operator would have to feed in all source tapes one by one acknowledging each by toggling key 11. After this, all tapes have to be fed in again in the same order for the second pass during which the binary is simultaenously written to the punch. This binary tape usually contains a loader and thus can be loaded via the initial instructions as was the assembler before. On the rear side of the PEC-Panel, one can see the new Transputer (top-left) with the selfmade CPLD interface which will finally take all functions from the old Transputer PCB (Lower-right PCB shown here). But for the time being, both Transputers are needed - but this poses no problem at all. The mainboard with the bunch of PCBs plugged in is the interface which connects the Transputer to PEC via Altera CPLDs (MAX7192SQC-15 and -7) and which is doing the hard real-time stuff.